发明名称 Emitter coupled logic circuit.
摘要 <p>An emitter coupled logic circuit includes variable impedance circuit (20) which is connected to at least one of two output terminals of the ECL circuit for variably providing an impedance connected to the one output terminal. An impedance to be provided when both the levels of the two outputs are at a high-level is set to be smaller than an impedance to be provided when at least one of the two outputs is at a low-level.</p>
申请公布号 EP0300698(A2) 申请公布日期 1989.01.25
申请号 EP19880306498 申请日期 1988.07.15
申请人 FUJITSU LIMITED 发明人 KOKADO, MASAYUKI
分类号 H03K17/04;H03K17/60;H03K19/00;H03K19/013;H03K19/018;H03K19/086 主分类号 H03K17/04
代理机构 代理人
主权项
地址