发明名称 Multiple time delay power controller apparatus with time delay turn-on and turn-off.
摘要 <p>A time delay power controller apparatus (12) has a power stage (74) and means for connecting said power stage (74) to a conventional power source. The apparatus (12) further comprises a plurality of time delayed outputs (36, 38, 40, 46, 48), a D.C. voltage bus (110) and a ground, a D.C. power supply (76) connected between the power stage (74) and the D.C. bus (110). Further, the apparatus (12) is equipped with a plurality of time delay, turn-on timing stages (84, 86, 88), each of which being connected between the D.C. bus (110) and ground and each including means for providing a time delayed voltage to a corresponding one of the time delayed outputs (36, 38, 40, 46, 48) in accordance with a preestablished turn-on time delay schedule. In order to enable proper equipment shut-down schedules to prevent equipment damage, to prevent the loss of data in electronic data processing equipment or to prevent unsafe operating conditions, there are also provided means for removing the voltages applied to the time delayed outputs (36, 38, 40, 46, 48) by the time delay turn-on timing stages (84, 86, 88) according to a preestablished turn-off time delay schedule</p>
申请公布号 EP0300091(A2) 申请公布日期 1989.01.25
申请号 EP19870116705 申请日期 1987.11.12
申请人 PULIZZI ENGINEERING, INC. 发明人 PEQUET, JOHN D.;PULIZZI, MICHAEL;COOK, ROGER
分类号 G06F1/26;G05F1/577;H02H9/00;H02J1/00;H02J3/14;H02J9/06 主分类号 G06F1/26
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