发明名称 POWER MOS TRANSISTOR STRUCTURE
摘要 PURPOSE: To improve the operating speed of an element by providing a connection layer which is brought into contact with all gates and connects each gate to its adjacent gate, a second connection layer which is brought into contact with all source regions and connects each source region to its adjacent source region, and a third connection layer which is connected to all drain regions. CONSTITUTION: Gate, source, and drain contact regions and three stages of connection layers are provided on the same peripheral surface of a substrate. The first-stage connection layer 20 is brought into contact with all gates, connects each gate to its adjacent gate, and has an opening on the connecting regions of sources and drains. On the connecting regions of sources and drains, a first insulating layer is opened. The second-stage connection layer 22 is brought into contact with all source regions and drains regions, connects each source or drain region to its adjacent source or drain region, and has holes for preventing the contact between each drain or source region. The third-stage connection layer 25 is continuously brought into contact with all drain or source regions and a second insulating layer is opened above the drain or source regions.
申请公布号 JPS6420666(A) 申请公布日期 1989.01.24
申请号 JP19880152107 申请日期 1988.06.20
申请人 SGS THOMSON MICROELECTRON SA 发明人 YUUJIYUNU TONERU;JIRE TOMASU
分类号 H01L21/768;H01L23/522;H01L23/528;H01L27/092;H01L29/06;H01L29/417;H01L29/423;H01L29/78 主分类号 H01L21/768
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