| 摘要 |
PURPOSE:To reduce an area of a chip by a method wherein a bipolar transistor, a p-channel MOSFET and an n-channel MOSFET are made composite in such a way that they keep a specific relationship of their mutual positions within a single island. CONSTITUTION:Because a ps region 10 and an n<+>c region 7 are short-circuited by a third electrode 31, a collector of a bipolar npn transistor Q1 is used in common with or is connected to a drain of an n-channel MOSFET Q2 and a source of a p-channel MOSFET Q3. In addition, because an ns region 6 and a pB region 4 are short-circuited by a second electrode 34; a base of the bipolar npn transistor Q1 is used in common with and is short-circuited electrically by a drain of the p-channel MOSFET Q3 and a source of the n-channel MOSFET Q2. By this setup, because a main transistor and a pair of MOSFET's can be made composite and be united, it is possible to reduce the area of a chip. |
