发明名称 WAFER SCALE INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To make full use of the already accumulated design assets so that a wafer scale integrated circuit device to be operated at high speed with high reliability, yield and spacial efficiency may be provided by a method wherein the numbers of already developed custom LSIs required for constituting a system with the numbers of LSIs determined in consideration of the manufacturing yield of respective LSIs added thereto are spread on a wafer to supply only the acceptable LSIs with the power from the system power supply. CONSTITUTION:One chip facsimile system is formed of an LSI set comprising respective LSIs arranged on a wafer 1. Respective LSIs are prepared for the independent form to be contained in an ordinary package excluding a scribed region. Thus, already developed LSI conforming to and serviceable for the system need not be newly developed enabling design assets to be used effectively. Furthermore, the numbers of respective LSIs arranged on one wafer is provided with the redundancy exceeding 100% so that the LSIs discharging the same functions may be arranged in exceeding two times of the numbers required for the system to increase the yield as the set.
申请公布号 JPS6419745(A) 申请公布日期 1989.01.23
申请号 JP19870174797 申请日期 1987.07.15
申请人 HITACHI LTD 发明人 NISHIO YOJI;KATSURA AKIHIRO;MIZUMURA TAKESHI
分类号 H01L21/82;H01L21/822;H01L27/02;H01L27/04 主分类号 H01L21/82
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