| 摘要 |
PURPOSE:To realize logical arithmetic between images so that the gate efficiency and the flexibility and the extendability of an arithmetic circuit are improved, by multiplying properly image element data by a numerical value to distribute and integrate the results of said multiplication and then performing arithmetic operations via a logical part connected at least to two of the outputs of a multiplication part. CONSTITUTION:The (n) pieces of image element data D0-D(n-1) inputted to a multiplication part 1 are multiplied by the proper numerical values A0-A(n-1). Thus the results D'0-D'(n-1) are obtained and distributed to a selector 2. The optional outputs of the selector 2 are sent to an integrating part for execution of arithmetic operations including addition, subtraction, etc., and a prescribed output is sent from the integrating part. In such constitution, a logical part 5 is added to a partial output of the part 1 to carry out the logical arithmetic operations including AND, NAND, OR, etc. At the same time, the outputs D'0-D'(n-1) are connected to a state arithmetic part 9 and the digital image processed together with the output of the integrating part is supplied to a desired circuit. Thus it is possible to perform the arithmetic processing at a speed higher than a large general-purpose computer. |
