发明名称 DATA BUS CONTROL SYSTEM
摘要 PURPOSE:To optimize the occupied time of a data bus and to smoothly process data by controlling the occupation and the release of the data bus via a control part in response to the quantity of the stored FIFO buffer data and the quantity of the transferred remaining data of a data bus control system. CONSTITUTION:A control part 4 of a data bus control system stores the input data into an FIFO buffer 1 and acquires the occupying right of a data bus 3 to a host device 2b to transfer data to the bus 3 from the buffer 1. Then the part 4 controls the occupation and the release of the bus 3 in response to the quantity of the acquired data and the quantity of the transferred remaining data of the buffer 1. Then a host I/F control part 40, an MPU 43, a data transfer control part 41, a ROM 44, a RAM 45, etc., are set to the part 4. The bus 3 is occupied when the quantity of data stored in the buffer 1 reaches a prescribed level and then released when the time needed for reading the quantity of the transferred remaining data exceeds a fixed level in an idle state of the buffer 1. Thus the occupied time of the bus 3 is optimized.
申请公布号 JPS6415855(A) 申请公布日期 1989.01.19
申请号 JP19870171950 申请日期 1987.07.09
申请人 FUJITSU LTD 发明人 KIMURA OSAMU
分类号 G06F13/362;G06F13/36 主分类号 G06F13/362
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