| 摘要 |
PURPOSE:To reduce the effect of inductance by setting up a grounding conductor onto a semiconductor integrated-circuit chip mount surface in a recessed section, connecting the grounding conductor to a metallic plate disposed onto the rear of a package and arranging an outer lead onto the rear of the package. CONSTITUTION:An integrated circuit chip 11 represents a GaAs logic integrated circuit chip using a GaAsMESFET, and loaded onto a grounding conductor film 3 in a recessed section 5 at the center of a base, and terminals for the chip and conductor wirings 61 are connected by bonding-wires 12. The power terminals on the chip 11 and power wirings on the base 1 are all disposed where nearest to each four corner, and upper electrodes for chip-capacitors 8 are bonded and connected to these power terminals and power wirings at the shortest distances. A covar-ring 13 is arranged onto a conductor film 10 in the periphery of the base, and the chip is hermetically sealed with a cover 14 made of a metal. These covar-ring 13 and cover 14 are connected electrically to the grounding conductor film 3 and a conductor film 62 by a conductor film 9 on the outer circumference of four corners. Accordingly, power noises are reduced by the capacitors having small capacitance, thus stabilizing ground potential. |
