发明名称 BUS ARBITRATING CIRCUIT
摘要 PURPOSE:To eliminate the local biasing of the system performance by incrementing the priority of each device (decrementing) by one every time device acquires a bus control right, and providing a priority revision circuit bringing the lowest (highest) priority of a device to the highest (lowest) as a result. CONSTITUTION:Every time any SCSI (Small Computer System Interface) device acquires a bus control right, the priority of each device is incremented (decremented 1) by 1 and the priority revision circuit 2 is provided, which brings the priority of the device whose priority reaches the lowest (highest) into the highest (lowest) as the result. Thus, a disadvantage of awaiting the acquisition of the priority is eliminated and the disadvantage of a SCSI device cannot acquire the bus control right for a long time by chance is eliminated.
申请公布号 JPS649558(A) 申请公布日期 1989.01.12
申请号 JP19870163936 申请日期 1987.07.02
申请人 FUJI ELECTRIC CO LTD 发明人 KOIKE MITSUHIKO
分类号 G06F13/362;G06F13/36 主分类号 G06F13/362
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