| 摘要 |
<p>PURPOSE:To maintain the consecutive chrominance carrier signal stored in a memory by writing a digital signal to n-set of memories by each sample and controlling the memory by a control clock having the same frequency as the chrominance subcarrier and subjected to phase locking. CONSTITUTION:A video signal from a terminal 1 is sampled by using a sampling frequency at an A/D converter 3 into a digital signal, fetched in DFFs 4-6 in a different timing and written in memories 7-9. In this case, a timing control 17 and an address counter 16 shift respectively the extraction timing of a data written in the memories 7-9 by 1/3 each of the period of the chrominance subcarrier and controls it to be in a prescribed location with the chrominance subcarrier. Thus, the phase on the video signal of the data written in each memory and the phase of the chrominance subcarrier are always kept to a prescribed relation. Thus, the color video signal consecutive to the chrominance subcarrier is obtained by having only to read the data from each memory in a prescribed order.</p> |
