发明名称 INTERFACE CIRCUIT IN MICROPROCESSOR
摘要 <p>PURPOSE:To contrive the reduction of an entire circuit by devising the titled circuit so that a numeral in response to a command of input/output operation designated for each input/output device is selected from a table, the numeral is counted by a clock signal and the operation is transferred next at the end of count. CONSTITUTION:A counted value corresponding to the input/output time of each input/output device is preset to each of a timing register 16 composed of plural registers. In detecting a command of read/write to an input/output device, a signal 140 is supplied to a counting control circuit 17 to load a counted value C2 from the timing register 16 to the inside of the counting control circuit 17. The circuit 17 starts the count of a clock signal CLK just after the count is set and in detecting the end of count, the signal of end display is generated and a sequence circuit starts the next operation. Thus, lots of input/output device capable of connecting buses with different response speeds are connected without using an external circuit such as a latch or a buffer, the device is miniaturized.</p>
申请公布号 JPS649562(A) 申请公布日期 1989.01.12
申请号 JP19870164998 申请日期 1987.07.01
申请人 FUJITSU LTD 发明人 ETO KOJI;OKAZAKI MAKOTO
分类号 G06F13/42;G06F15/78 主分类号 G06F13/42
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