SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PURPOSE:To reduce the power consumption of a 2nd decoder by inputting a high-order address of an address signal accessing a memory to the 2nd decoder selecting a bit line and inputting a low-order address to a 1st decoder selecting a word line. CONSTITUTION:The low-order address signal of the address signal is used for the input of the 1st decoder 2 selecting the word line of a built-in memory cell and the high-order address signal is used for the input of the 2nd decoder 3 selecting the bit line. The high-order address less in change frequency is inputted to the 2nd decoder 3 to reduce the number of times of switching thereby reducing the power consumption. On the other hand, the high-order address much in change frequency is inputted to a 1st decoder 2 but the power consumption is nearly constant. Thus, the power consumption of the 2nd decoder 3 is reduced without particularly increasing the power consumption of the 1st decoder 2.