| 摘要 |
PURPOSE:To accomplish the prompt feedback of data to the manufacturing condition setting means and enable the timely removal of defective products by a method wherein a checking pattern includes a plurality of elements different in sheet resistance. CONSTITUTION:A checking pattern 2 on a semiconductor substrate 1 is so designed as to help determine in the manufacturing process the resistance acting mainly on currents in a gate array incorporating sheets of two resistance values. That is to say, a pattern 3 of a resistance R1 (R1=ldeltaS1, where l is a coefficient and deltaS1 a sheet resistance value) acting mainly on circuit currents is connected in parallel with a pattern 4 of a resistance R2 (R2=K2.m.deltaS2, where K2 is a current compensating coefficient and (m) a coefficient) obtained after correcting the difference in current values between functional cells in use. The R2 pattern 4 is backed up by two patterns 4a and 4b respectively presenting different resistance values K, and the most suitable is selected out of the three in a wiring process. A check is made just after the patterning of the first Al layer. The detection in this way of the resistance presented by the checking pattern 2 enables the effective management of parameters required, dependent upon the characteristics of a circuit involved. |
