发明名称 |
Semiconductor device having different impurity concentration wells. |
摘要 |
<p>A semiconductor device comprises an N-type semiconductor substrate (301), a first P-type well (P-well-1) formed in the semiconductor substrate (301), a second P-type well (P-well-2) formed adjacent to the first P-type well (P-well-1) in the semiconductor substrate (301), the surface impurity concentration (P) of the second P-type well (P-well-2) being set lower than that (P<+><+>) of the first P-type well (P-well-1), a DRAM memory cell structure (311, 312) formed in the first P-type well (P-well-1), and an MOS transistor structure formed in the second P-type well (P-well-2) to function in combination with the memory cell structure.</p> |
申请公布号 |
EP0298421(A2) |
申请公布日期 |
1989.01.11 |
申请号 |
EP19880110709 |
申请日期 |
1988.07.05 |
申请人 |
KABUSHIKI KAISHA TOSHIBA;TOSHIBA MICRO-COMPUTER ENGINEERING CORPORATION |
发明人 |
SAWADA, SHIZUO C/O PATENT DIVISION;FUJII, SYUSO C/O PATENT DIVISION;OGIHARA, MASAKI |
分类号 |
H01L21/8234;H01L27/105;H01L27/108 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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