| 摘要 |
<p>An array of interconnected of processing element (PE) is simulated by a smaller array of such elements (20), which may contain as few as one element. The outputs from the smaller array are connected via delay elements (33,34) to the inputs. Control signals (30) are applied to the elements of the smaller array to cause them to carry out seriatim the functions of the elements of the simulated array.</p> |
