发明名称 SOFTWARE LOGICAL DEVICE
摘要 PURPOSE:To ensure the satisfactory perfectness of a logical device and also to confirm the working of the logical device in a low frequency, by describing a logical arithmetic program with use of the basic logical arithmetic elements of AND, OR, etc., and reading the arithmetic values of output variables of those elements out of an external device. CONSTITUTION:A test pattern production means 21 produces a test pattern to check whether a program 140 stored in a program memory means 14 is correct or not. Then the means 21 outputs the test pattern to a signal input means 11. At the same time, the expected value of the output variable of a basic arithmetic element is also obtained at that time point. A test result reading means 22 reads the arithmetic value of a basic arithmetic element output memory means 15 of a software logical device 1. A variable address information reading means 23 reads the memory contents of an address memory means 16 of the device 1 and stores them into a reading variable address memory means 24. A comparison means 25 compares the arithmetic value of the output variable of the basic arithmetic element read out by the means 22 with the expected value of the output variable of the basic arithmetic element produced by the means 21. Thus the soundness of the program 140 stored in the means 14 of the device 1 is checked and this checking result is outputted via an interface 26.
申请公布号 JPS643747(A) 申请公布日期 1989.01.09
申请号 JP19870157693 申请日期 1987.06.26
申请人 HITACHI LTD 发明人 SUZUKI SATORU;NAGAOKA YUKIO;IZUMI SHIGERU
分类号 G05B23/02;G01R31/317;G05B19/04;G05B19/048;G05B19/05;G06F11/22;G06F11/25;G06F11/26;G06F11/28;G06F17/50 主分类号 G05B23/02
代理机构 代理人
主权项
地址