发明名称 MULTI-POINT MONITORING FRAME SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To eliminate the need for a one-frame delay circuit by using an elastic memory for frame aligner as the one-frame delay circuit for multi-point monitor in common. CONSTITUTION:A 1st selection circuit 5 selects the position B for the state of synchronizing step-out by the control of a frame synchronization protection circuit 2 and selects a write reset signal caused once per frame generated by decoding an output of a one-frame counter 4 at a decoding circuit 9. Moreover, 2nd and 3rd selection circuits 6, 7 select the position B by the control of the protective circuit 2 in the state of the synchronizing step-out and select a read reset signal and a reception clock read by an elastic memory 1 at one-frame delay with respect to the write reset signal from the counter 4. Then the protective circuit 2 establishes frame synchronization by controlling the frame synchronizing counter 3 based on an output of the memory 1 subjected to 1 frame delay and a received data.
申请公布号 JPS644136(A) 申请公布日期 1989.01.09
申请号 JP19870157575 申请日期 1987.06.26
申请人 NEC CORP 发明人 UEKAWA FUKASHI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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