| 摘要 |
PURPOSE:To avoid the write of unstable data by controlling the off time of a writable signal according to the state of a power source interruption detecting signal before low direct current supply voltage obtained from an AC power source falls below a prescribed value. CONSTITUTION:The titled controller is provided with a power source control circuit 1 generating a first signal which takes a first value when low direct current power source impressed on the control means of a non-volatile memory is stably supplied and takes a second value when unexpected power source interruption occurs and a memory control interruption circuit 2 generating a third signal based on the time difference between a second signal obtained by delaying the first signal and the first signal and interrupting the memory writable signal by the last transition of the third signal. When the unexpected power source interruption occurs, data incourse of being written can be stored in a memory until a proper position through a gate circuit 4 by interrupting the writable signal with the trailing edge of the third signal. Thus the unstable state of write data can be eliminated. |
