发明名称 SPLIT GATE PREPROCESSOR
摘要 <p>SPLIT GATE PREPROCESSOR Successive MLS signals are converted into corresponding digital signals. The centroids of the digital signals are determined at two different levels by a digital peak detector. The centroids for each signal are averaged and the period of time between centroids is determined.</p>
申请公布号 CA1248207(A) 申请公布日期 1989.01.03
申请号 CA19850493595 申请日期 1985.10.22
申请人 HAZELTINE CORPORATION 发明人 ENEIN, MOHAMED;STRICKLAND, EVERETT P.
分类号 G01S1/56;(IPC1-7):G01S1/56;G01S1/16 主分类号 G01S1/56
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