| 摘要 |
PURPOSE:To constitute a full adder whose number of elements is small, and to realize a high integration by converting a binary input to a voltage signal, comparing first and the second reference voltages with first and second comparators, respectively, and controlling the second reference voltage by an output of the first comparator. CONSTITUTION:A ref1 is a prescribed reference voltage, and set between a medium low ML and a medium high MH of a quadratic value voltage by a carry output signal C. When a voltage of a node (c) is low L and ML by a comparator constituted of transistors Tr 5-7, Trs 6, 7 become OFF, and a carrying current signal C is generated. An ref2 is a fluctuation reference voltage, and determines a value of a resistance 4 and a constant-current source 12 so that it becomes a value between H are MH of a voltage of a node (b), when the Tr 7 is OFF, and goes to a voltage between L and ML of the voltage of the node (b). Only when the voltage of the node (b) is MH and L by a comparator constituted of Trs 8, 9, a current signal S of the sum is generated.
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