发明名称 TRACKING ERROR DETECTING CIRCUIT
摘要 <p>PURPOSE:To improve delay of the lock-in time due to a blind sector area, by forcibly switching a voltage to a DC voltage to use it as the tracking error voltage when the number of synchronizing pulses is smaller than a required number for an arbitrary certain period. CONSTITUTION:When an extent of off-track is large in case of output of the tracking error voltage from a sampling and holding circuit 6, a synchronizing signal for holding cannot be obtained and the error voltage is not outputted. This problem is improved by adding circuits as follows; a drum reference signal has the frequency divided by a frequency dividing circuit 12 and a counting circuit 14 is cleared through a monostable multivibrator 13 by the leading edge of the output pulse, and synchronizing pulses S outputted from a delay circuit 11 are counted by the circuit 14, and the number of pulses S is latched in a latch circuit 17 by the falling edge of the output of the circuit 12 and is compared with a set value M by a digital comparing circuit 18. When the set value M is equal to or larger than the number of pulses S, a switch circuit 20 is forcibly switched to output the DC voltage as the tracking error voltage.</p>
申请公布号 JPS63317962(A) 申请公布日期 1988.12.26
申请号 JP19870152698 申请日期 1987.06.19
申请人 CLARION CO LTD 发明人 SEKINE NOBUAKI
分类号 G11B15/467 主分类号 G11B15/467
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