发明名称 ARITHMETIC CIRCUIT FOR EUCLIDEAN MUTUAL DIVISION
摘要 PURPOSE:To attain a real time processing and the miniaturization of a circuit scale by detecting the stoppage of an operation with a flag to show a degree difference between a divided polynomial and a dividing polynomial, executing the replacement of both polynomials with other flag and multiplexing an operation with a time division. CONSTITUTION:Since an arithmetic part 2 time-divided, multiplexed and connected by an Euclidean mutual division calculates an error position polynomial sigma(x) and an evaluation polynomial omega(x), flags CR=H and IX=1 are obtained as initial conditions, and a syndrome polynomial S(x), initial polynomials B(x)=x<2x>, 1 and 0 of the data are inputted to respective P, Q, R and S series transmission lines of a control part 1. A flag IX shows that degree difference between two polynomials before a dividing operation. At the time of IX=-1, namely, when the degree of a dividing polynomial is larger than the degree of the divided polynomial, CR is made into H, and thus, a P series and a Q series are replaced by a control circuit 3 and a mutual division operation is continued. At each time dividing is executed, the value of IX is changed one by one [degree of omega(x)<degree of sigma(x)] is detected, and then, the operation is stopped.
申请公布号 JPS63316525(A) 申请公布日期 1988.12.23
申请号 JP19870152234 申请日期 1987.06.18
申请人 SONY CORP 发明人 SHIROTA NORIHISA
分类号 H03M13/00 主分类号 H03M13/00
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