发明名称 COMPLEMENTARY MIS INVERTER
摘要 <p>PURPOSE:To remarkably vary the operating speed of an inverter, by connecting in series a P-channel MIS transistor whose drain is connected to a gate between the source of the MIS transistor and a power source. CONSTITUTION:A connection point between a transistor QN1 and a transistor QP1 is set at a power source potential, and the value goes to the power source -VT(QN1). Therefore, since the power source potential is decreased when the threshold voltage VT(QN1) of the transistor QN1 is increased, a large time to charge the capacitance of an output node OUT is required. Also, since the VT of a transistor QN2 is also increased, the large time to discharge the capacitance of the output node OUT is required, thereby, the operating speed of the inverter is decreased. Similarly, since the small time to charge the capacitance of the output node OUT is required when the threshold voltage VT(QN1) of the transistor QN1 is decreased and the VT of the transistor QN2 is decreased, the small time to discharge the capacitance of the output node is required, thereby, the operating speed of the inverter can be increased. In such a way, the operating speed is varied remarkably based on the VT.</p>
申请公布号 JPS63314913(A) 申请公布日期 1988.12.22
申请号 JP19870151790 申请日期 1987.06.17
申请人 NEC CORP 发明人 NAKAKIDO KAZUTO
分类号 H03K5/13;H03K19/094;H03K19/0948 主分类号 H03K5/13
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