| 摘要 |
PURPOSE:To prevent the generation of such an erroneous operation that the interior of an LSI remains to be changed-over into a test mode by a method wherein, when a level signal is inputted in an external test input terminal, a test circuit is contrived so as to be always reset. CONSTITUTION:An LSI test circuit is provided with a counter 1, a singularity of an external test input terminal 10 for inputting a clock signal to make the counter 1 step, a differentiation circuit 9 to differentiate an input signal from the terminal 10, a decoder 2 to decode the output of the counter and fall- operation type flip-flops 3. The circuit 9 consists of a fall-operated flip-flop 5, rise-operated flip-flops 4 and 7 and an AND circuit 6. Moreover, an OR circuit 8, which makes a logical sum of the output signal of the circuit 9 and an RST signal, is connected to a reset terminal of the counter 1. A decoder selecting pulse from the terminal 10 is inputted in a clock terminal of the counter 1. Thereby, the output of the counter is decoded by the decoder 2 to output a test selecting signal, but the generation of an erroneous operation due to a spike is prevented by the flip-flops 3 which operate by the fall of an internal block.
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