| 摘要 |
PURPOSE:To prevent data from being erroneously produced due to the trouble of a reading register and to improve data reliability by carrying out the comparison between the parity arithmetic results of two reading registers which hold the read data given from a memory array. CONSTITUTION:The data read out of a memory array 10 are stored in 1st and 2nd reading registers 11 and 12. The output of the 1st register 11 produces immediately a parity and sends it to a CPU 25. While the data set at the 2nd register 12 are checked and corrected when a 1-bit error is detected to be stored by a next clock. Then the 1-bit error is sent to the CPU 25 together wit the parity produced in an error checking process. At the same time, the parities of all bits are produced in terms of the data on both registers 11 and 12. Then the parities of both registers are compared with each other. Thus no coincidence of input information is obtained between both registers 11 and 12 when either one of both registers has a trouble. In such a way, the troubles of the reading registers can be detected.
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