发明名称 CPU CONTROLLER
摘要 PURPOSE:To attain the processing of interrupt to stop runaway of a CPU in terms of the software by providing an address control means giving an interrupt processing execution instruction to an interrupt port of the CPU. CONSTITUTION:An interrupt data to detect and stop the runaway of a CPU 1 is stored in advance in an address (0000)H of a RAM 4. If the CPU 1 runs away, the CPU 1 cannot read normally the program, the program counter is revised sequentially and the address is changed from (FFFF)H into (0000)H. In this case, the CPU 1 executes the read access of the address (0000)H. An address decoder 2 outputs a chip select signal CSNMI being a nonmaskable interrupt signal to the interrupt port NMI of the CPU 1 from the address data stored in the (0000)H of the RAM 4 and the CPU 1 executes the nonmaskable interrupt processing.
申请公布号 JPS63310028(A) 申请公布日期 1988.12.19
申请号 JP19870145249 申请日期 1987.06.12
申请人 CANON INC 发明人 OGATA YUKIHIKO
分类号 G06F9/46;G06F9/48 主分类号 G06F9/46
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