| 摘要 |
PURPOSE:To contrive to high circuit integration and to reduce the number of circuit components by constituting a content call memory cell by a complementary collation MOSFET and an output MOSFET between a conventional dynamic memory cell and complementary retrieval information. CONSTITUTION:Plural data lines DC in parallel, complementary retrieval data lines the inverse of DC, plural word lines WC and output signal lines in parallel and in orthogonal to them, are provided, address selection FETs Q10 are arranged as a lattice to cross points between the lines DC, the inverse of DC and lines WC, output signal lines S, the drain is connected to a corresponding data line DC and the gate is connected to a corresponding word line WC. Moreover, P-channel and N-channel FETs Q1, Q12 for address selection are provided in series between the corresponding DC line, the inverse of DC lines, the gate is connected in common to the source of the Q10, the source and drain are connected to the gate of a FET Q14 to decide the level of the output line S. Through the constitution above, a content call cell is formed and the drain of the Q10 is connected alternately to the complementary data line by a prescribed regularity to save the circuit components and to attain high circuit integration.
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