| 摘要 |
PURPOSE:To suppress the generation of soft errors by forming an one-way conductive area to be source and drain areas of a MOS TR on an other-way conductive area and forming an one-way conductive area having resistivity equivalent to or less than that of the former one-way conductive area on a lower layer. CONSTITUTION:A load resistor 11 and a MOS TR12 constitute an inverter 13, a load resistor 21 and a MOS TR22 constitute an inverter 23 and these inverters 13, 23 constitute an FF to constitute a memory cell. The TR12 is obtained by forming accumulating an n type area 42 with about 10mum thickness on an (n<+>) type substrate 41 having about 0.5OMEGA.cm resistivity. A (p) type area 43 of which bottom reaches the substrate 41 is formed on a prescribed position of the area 42. The resistivity of the area 42 is set up to about 2OMEGA.cm. Moreover, (n<+>) type areas 44, 45 to be source and drain areas are formed on the surface of the area 43 and then a gate electrode 46 is formed between the areas 44, 45. The TR22 has the same construction. Thus, the generation of soft errors can be suppressed in a semiconductor storage device. |
