| 摘要 |
PURPOSE:To enable high-accuracy demodulation by providing plural zero-cross interval measuring counters and a control circuit which makes plural zero-cross interval measuring counters start counting in order according to the detection of zero-cross points and outputs a selection signal. CONSTITUTION:A delay compensating circuit which delays a demodulation output is provided and the variance in delay time from the change point of a source binary signal to the demodulation output is reduced to reduce single-point distortion. Namely, a register 201 stores a zero-cross interval measured value at a present zero-cross point and a register 202 stores a measured value at a last zero-cross point; and a demodulation output deciding circuit 13 generates a demodulated signal 19 from the output of the register 201 and a demodulated signal 19 is led to the D input terminal of a demodulation output FF 14. When the demodulated signal 19 is a last demodulation output, the demodulated signal is not inputted to the FF 14, but delayed through a delay compensating circuit 203 by a delay time determined by the values of the outputs 204 and 205 of the registers 201 and 202 and then inputted to the FF 14 with latch pulses 206. Thus, the demodulated signal is delayed properly and outputted to obtain a demodulation output having extremely small single-point distortion, thereby performing high-performance demodulation. |
