发明名称 FORMATION OF INSULATING LAYER
摘要 PURPOSE:To prevent the occurrence of voids due to air bubbles trapped in an insulating layer in the fine gaps between wirings by performing a heat treatment (reflow process) for planarizing the surface of the interlayer insulating layer in a high-pressure helium atmosphere. CONSTITUTION:To a high-pressure vessel 1 made of stainless steel, a gas introducing pipe 2 and a gas exhaust pipe 3 are connected respectively through a cut-off valve 4 and a pressure regulator valve 5, and a semiconductor substrate 6 received in a holder 7 is placed in the center of the high-pressure vessel 1. On the surface of the semiconductor substrate 6, a film to be subjected to a planarization heat treatment is formed which is made of phosphosilicate glass or the like, and around the holder 7, a heater 8 is provided for heating the semiconductor substrate 6. And the glass layer of the phosohosilicate or borophosphosilicate system produced on the semiconductor chip surface having a plurality of wirings arranged at fine intervals is heated in a high-pressure atmosphere so as to reflow. With this, the occurrence of voids in the insulating layer consisting of the phosphosilicate or borophosphosilicate system glass layer in the gaps between the wirings is prevented.
申请公布号 JPS63308350(A) 申请公布日期 1988.12.15
申请号 JP19870144273 申请日期 1987.06.10
申请人 FUJITSU LTD 发明人 FURUMURA YUJI;UOOCHI YASUO
分类号 H01L21/768;H01L21/316 主分类号 H01L21/768
代理机构 代理人
主权项
地址