| 发明名称 |
CMOS integrated circuit fan-in logic tree layout arrangement. |
| 摘要 |
A logic circuit, such as used in a crossbar digital switch, containing a multistage fan-in logic tree is arranged in a compact folded layout having a width equal to a single stage of the tree, in order to minimize wiring delays and signal skew.
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| 申请公布号 |
EP0295001(A2) |
申请公布日期 |
1988.12.14 |
| 申请号 |
EP19880305018 |
申请日期 |
1988.06.02 |
| 申请人 |
AMERICAN TELEPHONE AND TELEGRAPH COMPANY |
发明人 |
BARBER, FRANK E. |
| 分类号 |
H01L27/092;H01L21/8238;H03K17/00;H03K19/00;H03K19/003;H03K19/0175;H03K19/173 |
主分类号 |
H01L27/092 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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