| 摘要 |
PURPOSE:To decrease the transition time of an output signal at reversing by connecting a PNP bipolar transistor (TR) to the source of a P-channel MOS TR and an NPN bipolar TR to the source of an N-channel MOS TR so as to obtain an output signal from the common collector. CONSTITUTION:An input signal IN is fed to a gate of a P-channel MOS TR 19 and an N-channel MOS TR 20 whose drains are connected in common. A load element 21 is connected between the source of the MOS TR 19 and the power supply Vcc and a load element 21 is connected between the source of the MOS TR 20 and a ground point Vss respectively. Moreover, a base of the PNP bipolar TR 23 is connected to the source of the MOS TR 19 and the base of the NPN bipolar TR 24 is connected to the source of the MOS TR 20. Thus, the forward biasing speed is very fast and the transition time at reversed output signal is decreased.
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