| 摘要 |
PURPOSE:To reduce an occupying area by laminating a second conductivity type second FET on a first conductivity type first FET on a semiconductor substrate to a shape that the second conductivity type second FET jointly has a gate electrode. CONSTITUTION:When a first FET is formed in an NchFET, a gate oxide film 22 is shaped onto a P-type Si substrate 20, and polysilicon is deposited onto the gate oxide film 22 and worked finely so as to leave only a gate electrode 23. The polysilicon gate 23 is etched back until the surface of the polysilicon gate 23 is exposed, the surface of polysilicon is thermally oxidized again, and a section 26 as a gate oxide film in a second FET is formed. A through-hole is bored, and polysilicon 27 as the second FET is deposited. Phosphorus ions are implanted and concentration is adjusted, a resist 29 is worked so as to be left in a section as a channel region and a contact section of a common drain, and boron ions are implanted 28 to shape S/D regions in a PchFET. Accordingly, an occupying area is minimized, and the degree of integration can be improved.
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