发明名称 |
Memory with redundancy and predecoded signals |
摘要 |
A memory has an address buffer which receives a row address and a column address and outputs these buffered address signals to a predecoder. A row decoder and column decoder use predecoded signals provided by the predecoder to select a row and a column from a main array. A redundant row is provided to replace a defective row from the main array. A programmable redundant decoder is programmable to select the redundant row in response to the predecoder signals which select the defective row. |
申请公布号 |
US4791615(A) |
申请公布日期 |
1988.12.13 |
申请号 |
US19860944099 |
申请日期 |
1986.12.22 |
申请人 |
MOTOROLA, INC. |
发明人 |
PELLEY, III, PERRY H.;MORTON, BRUCE L. |
分类号 |
G11C8/12;G11C29/00;(IPC1-7):G11C11/40 |
主分类号 |
G11C8/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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