| 摘要 |
PURPOSE:To widen the frequency variable range without losing the stability by extracting an output signal of a variable frequency divider as an output signal of a PLL synthesizer device and frequency-dividing the output signal into 1/M so as to given the result to a phase comparator as a comparison signal. CONSTITUTION:An output signal (f) of a variable frequency divider 5 whose frequency division ratio is switched into a desired value being 1/N is given from an output terminal 7 as an output signal of the PLL synthesizer device and the signal is subject to 1/M frequency division by a frequency divider 4 and the result is given to a phase comparator 1, where the signal is compared with a frequency control signal (a). For example, the frequency division ratio 1/N of the variable frequency divider 5 is selected to 1/4 for a period when the frequency control signal frequency fa is 10-20MHz, 1/2 for 20-4OMHz and 1/1 for 40-80MHz period. Thus, the frequency variable range of the voltage controlled oscillator VCO 3 is enough to be 80-160MHz to generate an output signal (f) of 20-160MHz and the frequency variable ratio of the VCO 3 is enough to be 2 for the purpose.
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