发明名称 ARITHMETIC UNIT
摘要 PURPOSE:To decrease the hardware quantity by using a register which holds the data to be merged, a register which holds the merge data, and a means which merges the data by the position deciding and type signals. CONSTITUTION:A data register stores the data A to be merged; while data registers 200 and 400 store 0. Then a data register 500 stores the merge data B. The data supplied from both registers 100 and 200 are sent and stored into the registers 100 and 200 again as well as into a register file 300 by a shifter 600 and under the control of a shift control part 900. The data given from the register 300 is stored in the register 400. A selection means 700 undergoes the selection control via a character mode signal 10 a signal 20 which decides the setting position of data and sets the data received from the register 500 at the position before or after the data received from the register 400. Then the data set at the position before or after the data on the register 400 is removed and sent to the register 100, 200 or 400. Thus only a single shifter is required.
申请公布号 JPS63304317(A) 申请公布日期 1988.12.12
申请号 JP19870140853 申请日期 1987.06.04
申请人 NEC CORP;NEC ENG LTD 发明人 NAKAI YASUHIRO;FUJINO YUKIHIRO
分类号 G06F7/00;G06F5/01;G06F7/76;G06F17/24 主分类号 G06F7/00
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