| 摘要 |
PURPOSE:To improve a yield, by converting an address signal to select a memory cell inputted to each of plural memory cell array blocks to and from which data are inputted/outputted in parallel to the address signal capable of remedying a defective memory. CONSTITUTION:The titled device is provided with the plural memory cell array blocks 2a-2c to and from which the data are inputted and outputted in parallel, and address conversion means 11-13 which convert the address signal to select a memory cell being inputted to each of the memory cell array blocks 2a-2c to the address signal capable of remedying the defective memory are provided. Therefore, it is possible to switch the apparent address position of a defective bit by performing address conversion independently at every memory cell array blocks 2a-2c. In such a way, it is possible to remedy the defective bit impossible to be remedied, and to improve the yield of a semiconductor memory device.
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