发明名称 METHOD OF ADDRESSING TO REDUNDANCY ELEMENT OF MEMORY OF INTEGRATED CIRCUIT AND APPARATUS FOR IMPLEMENTING THE METHOD
摘要 The invention relates to a method of addressing redundant elements of an integrated memory (M) which comprises a network of row memory elements and column memory elements which can be addressed respectively via row addresses and column addresses, at least one bank (B) of fuses for storing the address of a defective element of the memory; the method consisting in: - for a bank (B), associating this bank with a row and column address pair; - storing, by blowing certain fuses in the bank, after testing a memory element, the address of either a column element in the case where the defective element is a column element, or a row element in the case where the defective element is a row element; - and checking only the row addresses when the stored address is that of a r ow element or only the column addresses when the stored address is that of a column element in order to address either a redundant row element, or a redundant column element. <IMAGE>
申请公布号 JPS63302498(A) 申请公布日期 1988.12.09
申请号 JP19880050580 申请日期 1988.03.03
申请人 S J S THOMSON MIKUROEREKUTORONIKUSU SA 发明人 JIYANNMARII GOOTEIE;JIYAN DOUBUAN
分类号 G11C11/413;G11C29/00;G11C29/04 主分类号 G11C11/413
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