| 摘要 |
PURPOSE:To reduce base resistance and wiring capacitance, and to improve the degree of integration while simplifying a process by selectively etching one part of an emitter region to expose a base region, forming a sidewall consisting of an oxide film into the emitter region through reactive ion etching and selectively depositing an electrode material. CONSTITUTION:One part of an emitter region 1 is etched selectively to expose a base region 2, a sidewall 11 composed of an oxide film is shaped into the emitter region through reactive ion etching, and an electrode material is deposited selectively. The emitter region 1 such as an N<+> emitter layer 1, the base region 2 such as a P-type base layer 2, an N-type collector layer 3, a collector electrode layer 4 and an LOCOS 6 are formed to a P-type substrate 5. An SiO2 film 7 is shaped onto the surface, and the film 7 is patterned to form an opening section 8 in one part of the emitter region 1. The emitter opening section 8 is etched selectively through an optical pumping etching method to expose the base layer 2, an SiO2 film 10 is shaped again, and an SiO2 film 11 is left only near the sidewall of an emitter 1' through RIE. Each electrode 12-14 is formed by selectively depositing Al or W.
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