发明名称 DMA CONTROL SYSTEM
摘要 PURPOSE:To operate a microprocessor in DMA transfer and to improve the throughput of a system by disconnecting a corresponding memory space and an input/output device logically from a system bus and connecting a buffer memory logically to the disconnected memory space. CONSTITUTION:The microprocessor 11 sets parameters 9 necessary for the DMA transfer to a DMA controller 12, first. At this time, the corresponding memory space and input/output device 14 are disconnected logically from the system bus 17. When the data transfer is completed, the DMA controller 12 sends an end interruption to the microprocessor 11, which receives this interruption and then connects the buffer memory 16 logically to the memory space which is disconnected previously. Consequently, the microprocessor 11 can operate during the DMA transfer and the use efficiency of the microprocessor 11 can be improved.
申请公布号 JPS63300346(A) 申请公布日期 1988.12.07
申请号 JP19870136325 申请日期 1987.05.30
申请人 TOSHIBA CORP 发明人 TSUKAZAWA TOSHIO
分类号 G06F13/28 主分类号 G06F13/28
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