发明名称 MEMORY DEVICE
摘要 PURPOSE:To realize a high density of a memory cell or the like by a method wherein the memory cell is constituted by the following: an MIS transistor whose source and drain are connected to a word line and a bit line, respectively; a diode which is connected between its gate and the bit line; a switching means which impresses a prescribed potential on the gate. CONSTITUTION:A first impurity diffusion region 11 is connected to a word line ML; a second impurity diffusion region 12 is connected to a bit line BL. As a result, if a PMOS transistor 1 as an MIS transistor is in an ON state, the word line WL and the bit line BL are conductive; if it is in an OFF state, the word line WL and the bit line BL are not conductive. An electric charge is stored in the parasitic capacitance of a gate 13 via a diode 2; a connection or a disconnection between the word line WL and the bit line BL is controlled by using this stored electric charge. The PMOS transistor 1 has an amplification function corresponding to a potential of the gate 13. Accordingly, it is possible to obtain a sufficient output of a cell without expanding an area of a capacitor or the like.
申请公布号 JPS63299266(A) 申请公布日期 1988.12.06
申请号 JP19870133992 申请日期 1987.05.29
申请人 SONY CORP 发明人 MATSUSHITA TAKESHI;TAKESHITA MITSUAKI
分类号 G11C11/402;G11C11/34;G11C11/401;H01L27/10 主分类号 G11C11/402
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