| 摘要 |
PURPOSE:To detect all bit troubles by providing the parity checking circuit of a data bus allocated to plural different addresses at the final end of a bus system and outputting and supervising the data parity-operated by a processor to the circuit periodically. CONSTITUTION:A parity checking circuit 4 to execute the parity-checking of the data of a data bus DB allocated to plural different addresses is provided at a final end of the bus DB, etc., when the address allocated to the circuit 4 is accessed, an address decoder 2 outputs an enable signal and in accordance with it, the circuit 4 executes the parity checking of the data of the bus DB. Further, when the checking result is normal, a resetting pulse is outputted to an access supervising circuit 3, and when the pulse is not outputted for a constant time or above, the circuit 3 is decided to be a trouble and outputs an alarm.
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