发明名称 CENTRAL PROCESSING UNIT
摘要 PURPOSE:To improve an action speed by executing an indivisible exclusive access to a common memory and executing the entry as a table entry to be renewed at the time of the execution of an entry renewing instruction in an address converting table. CONSTITUTION:At the time of converting from a virtual address 200 to an actual address, an entry 206 in a segment table 205 is designated by information 201 of the address 200 and an entry 208 in a page table 207 is designated by information 202. The base address of the table 205 is held at a table route register 204 and the base address of the table 207 is designated by the entry 206. Further, the base address of a page frame 210 in a main memory 209 is designated by the entry 208 and the position in the page of data 211 to be accessed is designated by information 203 from the address 200.
申请公布号 JPS63298652(A) 申请公布日期 1988.12.06
申请号 JP19870136879 申请日期 1987.05.29
申请人 NEC CORP 发明人 YANO YOICHI
分类号 G06F12/10;G06F9/52;G06F15/16;G06F15/177 主分类号 G06F12/10
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