| 摘要 |
PURPOSE:To double the speed of a working cycle in the areas except the place near the 0-address data by using plural 2-port memories which performs the writing and reading jobs independently of each other and a register which detours the 0-address data to write the input data alternately to those memories and selecting data out of those memories and register respectively for output of them. CONSTITUTION:The memory circuits 4 and 5 are provided together with a register 3 which detours the 0-address data, a rite address clock generating circuit 8 which supplies a write clock to use both circuits 4 and 5 with switching and at the same time stops the supply of the write clock to those memory circuits while the write clock is supplied to the register 3, a selector 6 which selects and delivers the data of the register 3 and circuits 4 and 5, and a read address clock generating circuit 9 which supplies a selection signal to the selector 6. In such a constitution, the storing actions are carried out at a high speed with use of plural 2-port memories. At the same time, the data of the optional length can be written and read out within the capacity with addition of a 0-address register.
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