| 摘要 |
PURPOSE:To shorten processing time in a rounding mode by transferring the instruction codes and data at one time to 1st-3rd floating point arithmetic units from a memory or a central processing unit CPU. CONSTITUTION:The titled unit is provided with units 10, 11, and 12. A 1st floating point arithmetic unit 10 receives the instruction codes and data from a memory 14 or a CPU13 to perform a floating point operation and rounds the result of this operation into the most approximate value. A 2nd floating point arithmetic unit 11 receives the instruction codes and data synchronously with transfer of the instruction codes and data to the unit 10 to perform a floating point operation and rounds the result of this operation into the plus direction. Then a 3rd floating point arithmetic unit 12 receives the instruction codes and data synchronously with transfer of them to the unit 10 to perform a floating point operation and rounds the result of this operation into the minus direction. Thus the operation results rounded in three rounding modes can be obtained at one time. |
