发明名称 Interleaved pipeline parallel processing architecture
摘要 A system for processing of data wherein the data is inputted over time into the system such that a second packet of data is inputted before a first packet of data, the system comprising a first processor coupled to a second processor, the first processor operating on only the first packet of data and the second processor operating on only the second packet of data.
申请公布号 US4789927(A) 申请公布日期 1988.12.06
申请号 US19860849004 申请日期 1986.04.07
申请人 SILICON GRAPHICS, INC. 发明人 HANNAH, MARC
分类号 G06F9/38;G06F15/80;(IPC1-7):G06F9/38 主分类号 G06F9/38
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