| 摘要 |
PURPOSE:To generate a high-accuracy timing clock by detecting the synchronism error between a device clock and a reference clock in each cycle and correcting the set delay quantity of the timing clock according to the error quantity. CONSTITUTION:A rate generator 101 inputs the reference clock 106, the device clock 105, and a timing setting control signal 107 and generates a test period signal 108 with an optional period. A phase clock generator 102 inputs the signal 108 and clock 106 and generates clock pulses 110 synchronized with the signal 108. A synchronism error detecting circuit 104, on the other hand, detects the synchronism error between the clock 106 and a synchronism test period signal 208 from the generator 101 and sends out an error signal 109 to the generator 103. The generator 103 inputs the pulses 110, clock 106, and control signal 107 and corrects the error detected by the circuit 104 to generate a timing clock 111. Consequently, the high-accuracy timing clock can be generated and a high-accuracy test can be conducted.
|
