发明名称 IC TEST SYSTEM
摘要 PURPOSE:To facilitate the alteration of a program, by a method wherein the execution by lines of a test program is controlled with a higher processor and actual execution of a program line is assigned to a plurality of lower-order processors which allow change to the execution of a provisional program. CONSTITUTION:A plurality of lower-order processors 23A-23N are connected to a higher-order processor 21. The processor 21 decides whether a program line read is executed or not checking a state of resting an element to be tested and assigns actual execution of a program line decided to be executed to any of the processors 23A-23N. The processors 23 are provided with a general-purpose memory 27 and an auxiliary memory 28. A provisional program for the changing of control by a control program or others is stored in the memory 28.
申请公布号 JPS63298176(A) 申请公布日期 1988.12.05
申请号 JP19870133813 申请日期 1987.05.29
申请人 ADVANTEST CORP 发明人 UEDA MOTOO;HASEGAWA SHINPEI;SHIMIZU TOSHIYUKI
分类号 G01R31/28;H01L21/66 主分类号 G01R31/28
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