发明名称 MOS-TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To provide a high-speed device by a method wherein source and drain regions of low impurity concentration in an LDD (Lightly-Doped Drain) structure are covered with a side wall gate and their electrical conditions are controlled by the side wall gate. CONSTITUTION:A side wall gate 9 is provided at an end face of a gate electrode 4 through the intermediary of a tunnel oxide film 8 and a low-concentration source and drain regions 71 and 72 are covered with the side wall gate 9. The side wall gate 9 is connected by the tunnel effect to the gate electrode 4. In such a design, a change in the potential of the gate electrode 4 causes a change in the potential of the side wall gate 9, which means that the low-concentration source and drain regions 71 and 72 are under control of the gate electrode 4. For example, in case of an N-channel device, application of a positive potential through a gate electrode 4 not only induces many electrons in the N-channel itself but also in a low-concentration source and drain regions 71 and 72. This accelerated the circuit operating speed.
申请公布号 JPS63296374(A) 申请公布日期 1988.12.02
申请号 JP19870132517 申请日期 1987.05.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 EZAKI TAKEYA
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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