发明名称 PEAK DISPLAY DEVICE FOR PREVENTING OVERLOAD IN ARITHMETIC UNIT FOR DIGITAL SIGNAL
摘要 PURPOSE:To prevent the result of digital arithmetic operation in a device from overflowing actually in an excellent way by applying overflow display even when the result of operation is large enough to prevent a predetermined margin. CONSTITUTION:A digital signal processor DSP multiplies a coefficient ax with the result of substantial arithmetic operation to cause a detection output in the overflow state when the substantial arithmetic result is large enough to exceed the margin for overflow prevention determined in advance. A pulse outputted to an output terminal 10 of a drive circuit DRC of a display section is fed to a display section DPA and the display of overflow or overload is applied. Since the margin for preventing overload is selected optionally by the coefficient ax, the overflow prevention with high accuracy is realized by selecting the margin to an optimum value in response to the property of the input signal.
申请公布号 JPS63292716(A) 申请公布日期 1988.11.30
申请号 JP19870127370 申请日期 1987.05.25
申请人 VICTOR CO OF JAPAN LTD 发明人 TANAKA YOSHIAKI
分类号 H03H17/02;G06F17/10 主分类号 H03H17/02
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